Two types of memory currently used in general purpose computer systems are static random access memory (SRAM) and dynamic random access memory (DRAM). Using static random access memory to store data is advantageous because static random access memory does not require periodic refresh signals in order to retain its contents. As a result, static random access memory contents can be preserved even when a computing system resets. One disadvantage to static random access memory is that it requires more transistors and therefore consumes more on-chip area per memory cell than dynamic random access memory. Dynamic random access memory is less expensive than and requires fewer transistors than static random access memory. However, dynamic random access memory requires a periodic refresh signal for the memory to retain its content. If an interruption occurs in the refresh signal, memory contents will be lost or corrupted.
In light of the cost and size advantages of dynamic random access memory, some microprocessors and their associated memory management and I/O controller chip sets are configured only to support dynamic random access memory. For example, the chip sets associated with the Intel Pentium® and Xeon® families of processors are configured to work only with dynamic random access memory. As a result, if the refresh signal from the memory management unit is interrupted, the contents of dynamic random access memory will be lost with these processor types.
One particular example where dynamic random access memory contents may be lost occurs when a processor hangs, the system resets, the memory management unit (MMU) is reinitialized and therefore memory contents are cleared. A hung processor condition may result from the processor executing a sequence of instructions that results in an infinite loop. If such a situation occurs, the processor may become incapable of performing any operations. When this occurs, a system or board reset is usually performed to restart the processor. When the processor restarts, one of the first operations usually performed by the processor is to initialize the MMU. Initialization of the MMU interrupts the refresh signal, thus corrupting the DRAM memory.
In some high performance computing applications, such as telephony computing applications, it may be desirable to preserve DRAM contents over system reset resulting from a hung processor condition. However, because the conventional solution is to corrupt, overwrite, or clear DRAM contents after reset in response to a hung processor condition, the cause of a hung processor condition may be difficult to determine.
Accordingly, there exists a long-felt need for improved methods and systems for detecting a hung processor condition and for preserving DRAM contents in response to the hung processor condition.